1. Field of the Invention
The present invention relates generally to switching power supply circuits and more particularly, to pulse width modulation systems for use in switching power supply circuits.
2. Background of the Invention
Switching power supply circuits are commonly used to convert an input AC or DC voltage or current to a different AC or DC voltage or current output. Such circuits typically include one or more switching devices (e.g., MOSFETs) and passive component(s) (e.g. inductors, capacitors) to convert energy from the input source to the output. It is known to use a pulse width modulation device to turn on and off the switching devices at a desired frequency. The pulse width modulation device regulates the output voltage, current or power delivered by the switching power supply circuit by varying the duty cycle applied to the switching devices.
Pulse width modulation devices such as these provide a simple, yet effective, tool for providing pulse width modulated signals with relatively precise durations and duty cycles and have been used in myriad applications, such as voltage regulation modules, DC/DC converters, and other electronic devices. To simplify the integration in conjunction with digital control systems, digitally-controlled pulse width modulation systems have been developed. These digitally-controlled pulse width modulation systems have been implemented in several forms, including as counters supplied by a high frequency clock, ring oscillators with a multiplexer together and with look-up tables.
As the desired resolution of the pulse width modulated signals continues to increase, existing digitally-controlled pulse width modulation systems have proven to be unsatisfactory in many respects. For example, high-resolution pulse width modulated signals provided by the digitally-controlled pulse width modulation systems can include waveform discontinuities and can lead to noise and oscillator sub-harmonics. Increased resolution also generally corresponds with very high oscillator frequencies, which can exceed one gigacycle.
In view of the foregoing, it is believed that a need exists for an improved pulse width modulation system that overcomes the aforementioned obstacles and deficiencies of currently-available pulse width modulation systems. More particularly, a need exists for high resolution pulse width modulation system for use in switching power supply circuits.
The present invention is directed toward a pulse width modulation system that is configured to receive a control signal and to provide a high-resolution pulse width modulated signal having a predetermined average duty cycle.
The pulse width modulation system includes a timing circuit, a dithering circuit, and a signal generator. The timing circuit is configured to provide one or more timing signals for the pulse width modulation system. Each of the timing signals can provide one timing pulse in accordance with a predetermined sequence during each timing cycle of the timing circuit. The dithering circuit is configured to receive the control signal and to provide a modified control signal. Upon receiving the modified control signal and the plurality of timing signals, the signal generator is configured to provide the pulse width modulated signal with a duty cycle, which, when averaged over a plurality of timing cycles, is approximately equal to the predetermined average duty cycle.
If the control signal comprises a (m+n)-bit binary word, for example, the pulse width modulation system can be configured to provide the pulse width modulated signal with the predetermined average duty cycle having a resolution of substantially 2xe2x88x92(m+n). The timing circuit is configured to provide 2m timing signals and the dithering circuit is configured to dither the control signal such that the modified control signal is a series of up to 2n m-bit binary words. The signal generator is configured to receive the 2m timing signals and the series of 2n m-bit binary words of the modified control signal and provide the pulse width modulated signal. When the duty cycle of the width modulated signal is averaged over a maximum of 2n timing cycles, the average duty cycle is approximately equal to the predetermined average duty cycle. The combination of the dithering circuit and the signal generator may provide the highest possible dithering frequency such that the system avoids the low frequency components in the spectrum of the pulse width modulated system. As a result, the present invention is ideally suited for power applications such as switching power supply circuits to reduce low frequency noise on the output.
Other aspects and features of the present invention will become apparent from consideration of the following description taken in conjunction with the accompanying drawings.